> 2) Missed too many ticks and replaced them with tocks. Fell far behind because of ridiculous tilt-at-windmill folly around Itanium and other architectural decisions that absolutely didn't pay off. Ended up taking way too long to get further down on process size.
I applied to Intel's architecture group in 2015, and when I asked one interviewer "does Intel have a strategy if TSMC catches up on process tech?" I was left with a blank stare, as though nobody in the group had contemplated the possibility. I didn't end up working there...
That said, Intel got exceptionally unlucky on which technologies they pursued and which they didn't, so I hope they can turn things around. They missed on through-silicon vias and chiplets, EUV, Cobalt wires, and several low-power transistor technologies.