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Comment by _delirium | Hacker News Reader

If 1400 picoseconds is the time it takes for a clock cycle (and therefore the minimum instruction time for 1-cycle instructions), that'd be about 700 MHz, which actually seems pretty high compared to what I would've guessed.

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As far as I know, the cores aren't clocked. Instead Chuck designed his own transistors using his own OKAD II VLSI tools to be efficient on the CMOS process node with switching speeds being dictated by the transistor type and interconnect electrical properties, then designed the cores so that they're only switching those transistors when they do actual work.

Ooh, awesome. Clockless computing seems like a really nifty idea, but its difficult. I imagine it might go mainstream when Moore's law finally runs out.

"difficult" does not even begin to encompass the half of it. It is really cool in theory, but in reality a ridiculously difficult challenge that existing tools are in no way whatsoever up for.

Take a look at the Balsa design system: http://apt.cs.man.ac.uk/projects/tools/balsa/

My colleague uses it for research purposes and he said that it is pretty mature.

I suspect if the only issue was translating architecture to logic, we'd be doing it already

There are other asynchronous CPUs, including implementations of popular architectures like MIPS and ARM: http://en.wikipedia.org/wiki/Asynchronous_circuit#Asynchrono...

From the site's Green Arrays Architecture paper [1]:

Our architecture explicitly omits a clock, saving energy and time among other benefits.

Also, they quoted instruction execution time as being as low as 1400 picoseconds, so 700MHz equivalence is probably the best case, not the average case.

Edit: They also say in the architecture paper that their goal is one billion operations per second, or 1GHz.

[1] http://www.greenarraychips.com/home/documents/greg/PB002-100...

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