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Comment by scottyallen | Hacker News Reader

Not being much of a hardware geek, I'm having a hard time evaluating how fast each core is.

From the site: "With instruction times as low as 1400 picoseconds and consuming as little as 7 picojoules of energy, each of the 144 computers can do its work with unprecedented speed for a microcontroller and yet at unprecedentedly low energy cost, transitioning between running and suspended states in gate delay times. When suspended, each of the computers uses less than 100 nanowatts."

How does this instruction time compare to other modern processors?

It sounds to me like some of the benefit to be had here may be from the low amount of power necessary per core. Power and associated cooling is a MAJOR source of cost for datacenters, and so if this really is a significantly lower power consumption (again, I don't know how much power the alternatives use), then it could have a big impact on the cost of commodity computation power.

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If 1400 picoseconds is the time it takes for a clock cycle (and therefore the minimum instruction time for 1-cycle instructions), that'd be about 700 MHz, which actually seems pretty high compared to what I would've guessed.

As far as I know, the cores aren't clocked. Instead Chuck designed his own transistors using his own OKAD II VLSI tools to be efficient on the CMOS process node with switching speeds being dictated by the transistor type and interconnect electrical properties, then designed the cores so that they're only switching those transistors when they do actual work.

From the site's Green Arrays Architecture paper [1]:

Our architecture explicitly omits a clock, saving energy and time among other benefits.

Also, they quoted instruction execution time as being as low as 1400 picoseconds, so 700MHz equivalence is probably the best case, not the average case.

Edit: They also say in the architecture paper that their goal is one billion operations per second, or 1GHz.

[1] http://www.greenarraychips.com/home/documents/greg/PB002-100...

Ooh, awesome. Clockless computing seems like a really nifty idea, but its difficult. I imagine it might go mainstream when Moore's law finally runs out.

"difficult" does not even begin to encompass the half of it. It is really cool in theory, but in reality a ridiculously difficult challenge that existing tools are in no way whatsoever up for.

Take a look at the Balsa design system: http://apt.cs.man.ac.uk/projects/tools/balsa/

My colleague uses it for research purposes and he said that it is pretty mature.

I suspect if the only issue was translating architecture to logic, we'd be doing it already

There are other asynchronous CPUs, including implementations of popular architectures like MIPS and ARM: http://en.wikipedia.org/wiki/Asynchronous_circuit#Asynchrono...

instruction times as low as 1400 picoseconds

As a random comparison, that's 1.4 nanoseconds per cycle. The PIC24H 16bit PIC microcontroller form Microchip runs at 40MHz, making it 12.5 nanoseconds per cycle. Now, I don't know enough about Chuck Moore's processors and haven't read the docs yet, so I don't know, for example, how many cycle a typical instruction would take, or how much work it takes to synchronise cores, but assuming 1 cycle per instruction, that would make these 144 core $20 processors 8.9 times faster per core. I know its not realistic to assume linear performance speedup from additional cores, but if we do 144 things at once, this makes them 1285 times faster than the PIC24H microcontroller, yet these processors only cost 4 to 6 (depending on amount of RAM) times the cost of a PIC24H microcontroller.

Note that the PIC24H microcontrollers are the more expensive, high performance (but not the highest) model of Microchips 16-bit PIC microcontrollers.

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