I'm not the author, and honestly know very little about ASICs. But apparently enough to get a design onto this tapeout! :D

If q3k's answer wasn't sufficient, maybe you can find more answers in the github repo that builds everything? https://github.com/mattvenn/wokwi-verilog-gds-test

Otherwise, there's a discord where the author (Matt) very active: https://discord.gg/rPK2nSjxy8