This uses the Skywater 130 process. It’s backed by an open source PDK (SKY130B), and is going to be taped out via an Efabless shuttle, just like OpenMPW shuttles sponsored by Google.
The difference between this and a ‘plain’ OpenMPW shuttle is that this can fit a ton of tiny/toy/demo designs, enabling a lot of people to get their toes wet with ASIC design without having to take up a ‘large’ shuttle spot.
It was the commercial shuttles, called ChipIgnite, that have had space left over.
but i don’t think it really matters - there have been lots of submissions for all of them and a ton of cool stuff, and yeah the recent open shuttles are definitely full :)
If q3k's answer wasn't sufficient, maybe you can find more answers in the github repo that builds everything? https://github.com/mattvenn/wokwi-verilog-gds-test
Otherwise, there's a discord where the author (Matt) very active: https://discord.gg/rPK2nSjxy8