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They really should just do transistors/mm^2 or transistors/mm^2/watt or something.

The problem with that measurement is that you get extremely different numbers depending on what you're making. e.g. the density of memory is massively different to the density of logic.

I don't think that's necessarily problematic anymore then measuring fluid viscosity is problematic. Once someone start's getting into debates over the size of transistors on microprocessors then you are already getting pretty wonky and are going to need some science to describe things anyways.

So you pick something relatively standard (like an SRAM cell), and you use that.

There was a concerted effort some time back to formalize a standard measurement of process density using something like "million transistors per square centimetre" by a standards organization. (IEEE?) It wasn't a perfect measurement but it was a lot better than width. It failed so completely that I can't even Google it any more. The awkward name probably didn't help.

edit: it's "MT/mm2". Some people actually use it, but more in the informal sense that has the problem you espoused rather than the formalized one, which I still can't find.

A lot of Wall Street seems to have issues with non GAAP accounting metrics like Annual Recurring Revenue (based on the the few earnings meeting I've listened in on), I don't have high hopes that this would work.

Like this: https://ieeexplore.ieee.org/document/9063714

That wouldn't capture the fact that there are fundamental physical barriers being run into. "Smallest feature size" is a perfectly adequate metric until things get complicated. Replacing an insufficient simple metric with a different one insufficient metric isn't the right solution imo.

Each node will have many sets of transistors depending on what you want in the tradeoffs between power/density/performance. Typically a half dozen or so options.

Well current is proportional to W/L, and W and L is area

We can always increase W, but decreasing L requires technological advancements

So I’m not sure on the value of area (W and L), L alone is more relevant (for the reason I said above)

we are dealing with finfets / GAA now which are not the same as planner transistor, but I guess there should still be relevance in L and W because these measurements are important even for resistors

So probably some sort of equivalence between a FF and a planar transistor should be given to name the nodes

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