Making multilayer nanosheets means O(n) additional multi-patterning imaging steps. 1x for each nanosheet layer. This is what is possible with current "bruteforce" approach.

A nanosheet device will have to get thicker for an equal performance to FinFET if they want to keep the number of layers sane.

This is why it's accepted that first generations of multilayer GAA devices will be inferior to FinFETs of equivalent density.

Everybody is of course searching for how to do multiple nanosheets with single imaging step.

20 years old experimental nanosheet designs won't do it in production today. I.E. cutting multiple sheets with RIE is way too coarse, and destructive for modern feature sizes. Depositing sheets into a negative pattern on a sacrificial poly layer brings alignment issues.