Is the PCI-E bus really so noisy?
Remember socket AM4, which added support for PCIe 4.0 with chipset X570? Originally, the idea was that non-X570 boards would also have PCIe 4.0, as it doesn't actually depend on the chipset - just the CPU. Turns out most boards simply weren't capable of handling the additional bandwidth, so it was eventually restricted to boards which were designed for it. And that's at one-eighth the bandwidth of PCIe 7.0!
In practice it's a bunch of point-to-point links, but even then the path across a PCB is pretty brutal in terms of loss. Cables are (surprisingly to me, initially!) better.
Overall though, sending some number of additional bits for error correction is often cheaper than driving the line harder to reduce the bit error rate.
Put differently: we could manage lower noise, but it would either result in a lower bitrate or (much) higher power. Instead, pick a target goodput and design for power and error correction from both sides.
That's because the cables in these application are not single wires but complex micro-coaxial assemblies. (The industry best is 3M Twin Axial.) And that will have much more shielding than an inherently unshielded PCB trace. With an appropriate price, of course.
Note that on balance I'll take something like an OSFP assembly (https://www.te.com/usa-en/products/connectors/pluggable-conn...) with a fancy jacket that pulls all of the individual twinax cables together, but it's also substantially more expensive than a simple flat tape-wrapped ribbon.
Other places where you'll see coax cables ganged together inside a jacket: high-speed USB cables. For example, here's a type C cable cross-section: https://twitter.com/tubetimeus/status/1125926941469462528
At this point the bits are millimeters long.