> The term "3 nanometer" has no relation to any actual physical feature (such as gate length, metal pitch or gate pitch) of the transistors. It is a commercial or marketing term used by individual microchip manufacturers to refer to a new, improved generation of silicon semiconductor chips in terms of increased transistor density (i.e. a higher degree of miniaturization), increased speed and reduced power consumption, However, there is no industry-wide agreement among different manufacturers about what numbers would define a 3 nm node. For example, TSMC has stated that its 3 nm FinFET chips will reduce power consumption by 25 to 30 percent at the same speed, increase speed by 10 to 15 percent at the same amount of power and increase transistor density by about 33 percent compared to its previous 5 nm FinFET chips.
The same article states that transistor densities for Samsung 3nm will be 202.85 Million transistors per mm2 and for TSMC 314.73 Million transistors per mm2 so quite a big difference.
If the transistors were 2D and square then that makes Samsung's 3nm transistors actually 70nm, and TSMC's 56nm according to my maths!