And given that there's no way a single process node jump is going to give Intel a 75% uplift in instruction per clock (2 nodes wouldn't give them that either, for that matter), Intel is going to have to clock higher for comparable performance and that's still going to put them behind on power consumption (which is exponential in clock speed).

Which is to say, it's completely untrue that the only reason these chips look good for speed/power-consumption is the process node they're on. Apple came up with a super-wide architecture (way wider than anything we've ever seen in x86-64), and they made it pay off by getting good performance out of a much lower maximum clock, which bought them a ton of power efficiency.

The M1 is a spectacular chip. The M2 seems like a fine iteration.

AMD will have process node parity with Apple this year - Zen4 will be on N5P, as will M2. I doubt that alone will be sufficient for x86 to catch up, they have a LOT of ground to make up.

(this is, of course, the "small" laptop chip for Apple, the M2 Pro/Max will add more CPU cores and a much larger GPU, but you can still extrapolate the performance trends once we see Zen4 and I doubt it's going to be all that flattering. AMD has said "minimum of 15% faster", but even if that works out to 40% on average, Apple just made their own 18% leap, and the current architectural gap is much larger than 22% according to SPEC2017 benchmarks.)

It's not all just "apple wants to go bigger" either - Apple's cores are quite svelte in terms of transistor count as well, they're in between Zen3 and Alder Lake transistor count (this is supposition, but I think they would still be slightly smaller than Alder Lake even if you removed the AVX-512 support from Alder Lake). Most of their transistors go towards a truly titanic GPU, the cores themselves are fairly small (the efficiency cores in particular are impressively small for the performance they give).

And yes, of course "Apple has chosen to target slightly lower clock rates with really high IPC", but that is enabled by design decisions that ARMv8 allows (really deep reorder buffer, really wide decode) that x86 cannot replicate as easily, you can't just triple x86's IPC by targeting a slightly lower clockrate and going wider.

And yes, ARM code is slightly less dense - about 12% larger than x86 when compiling the SPEC2017 test suite, according to the numbers from the RISC-V people. That's not where the difference comes from either, it's not just "high IPC on low density code".

I know what Jim Keller said, and he's right, x86 isn't dead, but it's not ahead right now either, even considering Apple is on 5nm. When AMD is on 5nm this year, we can re-assess and see whether that was the driving factor, or whether there are design reasons as well.

People seem to have interpreted Keller's comments as being "it is physically impossible for ISA to make any perceptible difference in perf-per-transistor or perf-per-watt" and I'm not sure that's a statement he would agree with. A 10-20% advantage to restructuring your architecture in a way that enables deeper reorder and better decoding vs x86, seems like a reasonable premise to me. Especially considering the baseline is x86, the quintessential legacy behemoth ISA. There has been a lot of work to keep it in play, but that means a lot of the "easy tricks" like instruction cache have already been exploited just to get it this far. Surely there are things that could have been done better from a clean start.

That is why nobody buys windows based laptops anymore and the macbook air is the best selling laptop

you don't need apple marketing team to see how people are fed-up with hot windows laptops and their noisy fans (and blind btw, pun intended or maybe not lol)