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Maybe it helps you conceptualize design the circuit?

Isn't vhdl more about simply formally and thoroughly defining it?

Can you play with ideas and check things out by just noodling in vhdl?

Yeah, you can drop your hdl in a test bench project and simulate it with modelsim or xilinx tools (I think their main one is still vivado). You can even define your hardware in c using vivado hls.

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