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Cool! Yeah I would be interested in that. I would actually have some use cases for edge compute if it can fit into tiny FPGAs like the ICE40.

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Here is an example of deploying a basic ML application to an ICE40 using a custom Keras to NN generator https://github.com/edge-analytics/fpga-sleep-tracker

So it definitely can be done with some careful attention to the limited number of multipliers on the device. I’ll be curious to check out how Tensil does in terms of mapping with highly resource constrained FPGAs. Regardless, Tensil looks like a very cool tool.

Wow, awesome project! This is exactly the kind of thing we had in mind when we built Tensil. I'd be very curious to hear what happens if you make a v2 perhaps using Tensil for comparison.

That's excellent - feel free to join our Discord if you'd like to brainstorm ideas or get help choosing models and boards https://discord.gg/TSw34H3PXr

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