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Paging a semiconductor engineer. Isn't it not necessarily possible to do die shrinks and get drop-in compatibility, particularly for Q rated automotive chips? Moreover, some of these chips eat 5 volts by design and I don't think 28nm or 14nm or 7nm will provide enough resistance for that. Plus, some have pmic or internal power mosfets that are specific to various processes.

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It's almost never possible to do a function-compatible die shrink for anything that needs to work over a large voltage and/or temperature range. Many automotive chips operate at 80V or more, 5V and 12V parts are ubiquitous, and indeed lots need bulk area to be able to switch large currents. Making them on small processes is not only an enormous design effort where it's possible at all, it also doesn't make sense because there's still way more capacity on larger processes than on smaller ones, and the only way small processes win is by packing so many dies on a wafer that they can get away with their terrible per-wafer cost and awfully bad defect rate.

Thanks for the informed reply.

Think of it this way. You could probably design something logic-compatible, voltage-compatible, speed-compatible... but a chip is fundamentally an analog device with sensitivity. You can't change the mask, let alone the process, and still have the same device. Something will be different. Certification is the process of saying the difference is OK.

Right right. I see a lot of pmic parts, newer MCUs, 3.3V and 5V tolerant parts, as well as various FPGAs out of stock. All of these are fabbed on >40nm or more, sometimes much more.

Not going to ram 5V through a 7nm finFET.

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