Nope, you need to be compatible with the architecture specification, and it lays out exactly what can be implementation defined and what can't. E.g. you're allowed some freedom in what features to implement (Apple doesn't implement EL3 and this is fine), and you can add implementation defined system registers (Apple has a huge number of them, e.g. to implement TSO for Rosetta). But you can't decide not to support mandatory features (Apple forces on VHE mode, which is not legal - VHE is optional, non-VHE mode isn't), nor can you add extensions to the core ISA. Apple added AMX, memory compression/decompression, a variant of the AT instructions that outputs to a GPR, and the whole Guarded Execution feature (two new parallel exception levels and machinery to call to/from them and lock down things to them), and possibly more, all of them in reserved instruction encoding space.