Hacker News Reader

Comment by floatboth | Hacker News Reader

Hm, should the same be done for aarch64? Generally compilers (well, clang) seem to use CSEL all the time anyway, would be interesting to investigate this.

View on HN

Can be done, ARM has better support for predicated instructions. May be done without using inline assembly.

But I guess ARM CPUs can also have a smaller branch penalty, which means less speedup from such a patch.

You can try it by replacing the inline assembly with the commented code above it (also don't forget to remove i386 and x86_64 from #if). (Although the code could be rewritten a bit to help the compiler make better binary code for ARM.)

So far I've got these results:

   Allwinner H616 (Cortex-A53) 64-bit mode
   
   linux-5.15.7.tar.xz : 25.12 --> 24.43 (+3%)
   linux-firmware-20211027.tar.xz : 22.80 --> 21.63 (+5%)

Maybe on more complex ARM processors the results will be better.

Update: It looks like I need to use inline assembly for AArch64 or GCC where it can make two CSEL instructions from the same condition - replaces them with if-else branch.

And I got better results (below) than when tried to avoid this compiler behavior but didn't use inline assembly (results above).

    linux-5.15.7.tar.xz : 25.12 --> 23.85 (+5%)
    linux-firmware-20211027.tar.xz : 22.80 --> 21.10 (+8%)

I tried it and realized that predicated instructions are removed from aarch64, which I was not aware of (because I rarely work with ARM). That sucks. But I'll try to do it without them.

Reply on news.ycombinator.com