In processor micro-architecture the hard problems come when you're trying to hit a frequency, power or area target. You may need to do some interesting things that can be quite circuit specific and have complex tradeoffs (e.g. perhaps you choose to handle some corner case that produces a large timing path with some kind of stall or replay when it occurs, is the corner case sufficiently infrequent that overall you get a performance increase?). Having some high level way to sweep through the design space here would be incredibly useful, but the problem is building each point of the design space can be its own complex task.
Having a high level description you can easily fiddle with in order to try different kinds of complex instructions, easily play around with structure sizing and the like sounds great. The problem is if it doesn't produce a design that's as optimal as the hand-coded RTL could be you might get the best design for your application that the tool can make but it gets outperformed by a more standard design that's normal hand-coded RTL.
It's tempting to compare to software, where high-level code is often preferred even if it's not the most efficient due to the other benefits it brings but chips have certain fixed manufacturing costs that just aren't present in software. Due to these costs it's often better to put more into the design, by more detailed low-level work, in order to get a more optimal design.
Though that said I really need to spend some more time with these higher-level tools. I'm sure there's some great stuff to be done with them.