L3 is almost never SRAM, it's usually eDRAM and clocked significantly lower than L1 or L2.
(SRAM is prohibitively expensive to do at scale due to die area required).
Edit: Nope, I'm wrong. It's pretty much only Power that has this.
(SRAM is prohibitively expensive to do at scale due to die area required).
Edit: Nope, I'm wrong. It's pretty much only Power that has this.
IBM has eDRAM on a number of chips in varying capacities, but... its difficult for me to think of Intel, AMD, Apple, ARM, or other chips that have eDRAM of any kind.
Intel had one: the eDRAM "Crystalwell" chip, but that is seemingly a one-off and never attempted again. Even then, this was a 2nd die that was "glued" onto the main chip, and not like IBM's truly eDRAM (embedded into the same process).
EDIT: Oh, apparently there were smaller 64MB eDRAM on later chips, as you mentioned. Well, today I learned something.
Crystalwell was the codename for the eDRAM that was grafted onto Broadwell. (EDIT: Apparently Haswell, but... yeah. Crystalwell + Haswell for eDRAM goodness)
I think it's the same with Intel too except for that one 5th gen chip.