I don't quite buy that you could really have said the same about the 32 bit to 64 bit transition. 4 Gigabytes is a far cry from 18 exabytes! It is going to be a long while till we scale up to that level.
And then there was the time, a handful of years later, when "No one will ever need more than 640KB".
And then 4GB was stupidly massive, and no-one could want, let alone afford, that much RAM.
The same with CPU clockspeed (my first computer ran at 2MHz), storage capacity (I paid several thousand dollars for my first 5MB hard drive).
Which is not to say that the curve won't flatten out as we approach the number of atoms in the universe, but ... there's never quite enough of anything.
And those 2D circuits fit, eg. 4Gbits of DRAM into a single layer chip. The actual chip inside the plastic packaging is quite small -- let's say 4x4mm.
Now, you can can pack multiple layers of chips into a single package. Samsung is doing at least 12 layers for HBM, for instance, and they're only 60um thick each.
So you've got a chip that is roughly 65536 cells wide, and 65536 cells long, but you can only stack it 12 cells high.
Let's get that to 65536 layers: roughly a 4mm cube. That's now 256Tbits per package. Put 36 of those on a DIMM, and you've got an 8PB DIMM, and 512 PB in a 64 DIMM slot server.
Perhaps we can double the density? That gives us 4EB in a server.
This totally glosses over myriad difficult issues, but it's a very, very long way from being inconceivable when you consider the difference between a 512 byte 2114 RAM chip that was popular when I got my first computer, and what we have today.
I suspect it’ll happen because a 128 bit wide bus will be useful for calculations.
A 64-but cpu has registers that are larger than 64-bits (eg 512bits for AVX512) and the memory bus itself is already either 128 or 256bit already.
128bit pointers seems questionable for scalar processing and vector processing already has wider registers/GPU/TPU for acceleration.
From a security perspective 64bits of random space (actually 48ish) is pretty darn good and increasing that space for security is not something I’ve seen compelling papers on.
We do not need 128 bit data types in hardware. We barely even need data types with 64 bits of precision. It crops up every now and then- for instance, 32 bit floats cannot store a latitude/longitude value precisely enough, however a 32 bit integer can store a longitude value to about 1 foot of precision if -2^32 is 180 degrees west and 2^32 is 180 degrees east. (this has the nifty benefit of 2s complement integer overflow doing the right thing, although only with longitude, not latitude. but I digress.)
There are a handful of situations where you do need more precision than that- RSA and DH come to mind. But in those situations, you'll need arbitrary precision arithmetic anyway. A 128 bit register won't help a whole lot- certainly not enough to offset the cost of doubling the size of all your ALUs, even if the machine is a special purpose one that does nothing but sign SSL certs all day.