TSMC advertises 5nm as +15% performance OR -30% power consumption. Either one of these won’t be enough to bridge the gap in mobile. Even throwing in another massive 20% IPC improvement wouldn’t do the trick.

On the flip side, once you go bigger the game changes. If you increase the M1 power consumption to amount for interconnects, more memory lanes, more IO, etc the M1 seems to offer worse power to performance that shouldn’t be too unexpected. ARM just announced they are splitting into V1 (performance above all) and N2 (best power, size, performance combo)