No one is investing in mature fab lines because they're not leading edge and they're being run to amortize the initial investmnet made into them years ago. Therefore not much additional capacity for mature lines.
So yes you can see 5nm chips being taped out but the 40-130nm chips are squeezed for capacity. Also this chip is likely not running in the same crazy volumes that ST microcontrollers. It is easier for TSMC to squeeze in a few dozen to a hundred wafers for SiFive on their line.