Putting the memory and CPU into standby was done by setting/clearing variout bits and various control registers (memory mapped). The code to do this was in a loop that executed twice. A CPU register set to zero the first time round and set to 0xffffffff the second time round, to use as a mask.

All control register changes were then performed in the loop, with changes to the control registers masked by the mask register so that no changes were actually made the first time round the loop, but all code was loaded into the CPU cache, then the second time round the loop changes were made and the memory+CPU put to sleep.

The MIPS CPU was quite nice, because when it woke up after this all state was preserved, so it just carried on as if nothing had happened. And memory contents were preserved through standby as well, so it was all fairly simple.

This is in contrast to some ARM CPUs I've used where when they wake up after sleep, they jump to the reset address, so the boot code has to be aware of sleep/wake operations, which was a bit of a pain.