(something like Project Oberon)
Maybe a relay-based CPU.
An alternative high-CPU count, low individual CPU-capability, multi-cpu system on a single chip, each with small amount of memory with "network-on-chip" interconnects.
I'm also interested in the alternative multi-CPU system on a single chip you mentioned. I have no real experience with chip development, but it sounds like a very cool idea! Do you have previous experience with chip development, or would this be your first foray into that area?
I haven't done a recent survey and there might be better options now, but...
I'd start with basic FPGA development with a hobbyist board (an Alchitry or Arduino Vidor or somesuch), learn a hardware description language, play a bit and then look as some open source CPU designs.
There are a few open source designs with very low LUT (lookup table) counts, I'd probably start looking at those.
What I have in mind is something super-simple, just enough to be able to implement a single object or function. I'm aiming at mapping a high-level language almost directly to gates.
I don't have much of a plan for the interconnects yet, but I'm sure there should be some simple scheme I could start with.
I'm not sure about actually getting to an ASIC chip, I'd probably just end up going for the biggest FPGAs I could afford or finding ways to interconnect a few smaller ones.
I'm definitely not super knowledgeable of the hardware space, but from what little I know, your current plan sounds reasonable and well-scoped! I wish you the best of luck with undertaking this project if you decide to go forward with it.