I highly recommend you to read Linear Technology AN104 - Load Transient Response Testing for Voltage Regulators [0] to understand the staggering challenge in hardware engineering to design an acceptable voltage regulator for digital processors. Even though it describes 2006's tech for a simple embedded system - it's basically a toy today, but makes a good example.

The problem is transient response. The power consumption of digital processors varies wildly. For example, if a processor suddenly switches from an idle to active state, a sudden increase of current consumption makes the voltage to fall, until the regulator is able to react by conducting more power, hopefully fast and smooth enough before the processor crashes, on the scale of microseconds or even nanoseconds. This is not a trivial problem. Inductance is another problem - in any closed circuit, every piece of conductor has the tendency to resist the change of current, which means even if the regulator itself is ideal, if it's too far from the processor, it's physically impossible to react fast enough before the output voltage goes out of control, thus all ASIC requires local regulation, and the end result is extremely sensitive to board layouts and components choices.

This note describes how to build a "simulator" to test such transient currents and analyzes various circuits for this purpose - not very readable and you can just ignore this part. Just read page 1, then start reading page 6 ("Capacitor’s Role in Regulator Response") for some actual tests. Page 8 has a practical example: testing a power supply for Intel P30 Embedded Memory.

> supply tolerances are tight. Figure 26’s error budget shows only 0.1 V allowable excursion from 1.8 V, including all DC and dynamic errors. The LTC1844-1.8 regulator has a 1.75% initial tolerance (31.5 mV), leaving only a 68.5 mV dynamic error allowance.

2020 PC hardware is at least two orders of magnitude more complex than that. A simple example can be Altera Corporation AN 574: Printed Circuit Board Power Delivery Network Design Methodology for an FPGA - every single component connected to the power supply (and the circuit board itself) must be modeled and simulated as a resonant circuit with complicated frequency response and impedance characteristics [1].

[0] https://www.analog.com/media/en/technical-documentation/appl...

[1] https://www.intel.com/content/dam/www/programmable/us/en/pdf...