Looks like it's ultimately an llvm backend that'll generate VHDL, Verilog, or SystemC, and has some optimizations it'll do for the exact family of chip you're running on. Knowing what the hard DSP blocks can do and writing code that'll use them kind of stuff (as well as a few farily generic optimization passes).

It doesn't appear to know anything about bitstreams and works at a higher level that'll be synthesized by another tool.

https://github.com/Xilinx/HLS/blob/da538325ea9cb410672be6bb1...

Awesome, fairly reusable looking work being opened by them. A lot more than I expected from the title. Good work, Xilinx!