Yep, it's the de facto automation language for IC design and EDA. I use it everyday. It's not a language I'd use for anything else, but as almost all EDA tools embed it, you have to learn it to be productive in the digital EE world
Yes. A typical SoC is assembled using thousands of lines of TCL to drive the various EDA tools that are involved in the design process.
Yeah. Most Cadence and Synopsys tools for synthesis, place and route, static timing analysis, all have Tcl as the built in scripting language.