> Assuming a random (but TLB friendly) pattern the M1 manages a latency of around 30-33ns to main memory.
This, right here. It also helps that the L1D is a whopping 128 kB and only 3 cycles of load-use latency.
This, right here. It also helps that the L1D is a whopping 128 kB and only 3 cycles of load-use latency.
Larger pages mean that performance on memory-mapped small files will suffer... which is a use-case that Apple doesn't normally care about in its client computers.
Larger cache lines mean that highly mulththreaded server loads could suffer from false sharing more often. Again, its a client computer so who cares?
Regarding the definition of "huge": A64FX uses 256B cache lines. Granted its a numerical computing vector machine, but still. Huge covers a lot of ground.