AMD, Nvidia, and Marvell after the Cavium acquisition could do it. Intel could too but wouldn’t unless the x86 market tanked badly.
That has always been a question of when, not if. And M1 shows that it is quickly approaching. In a market where physical limits have slowed down miniaturization, with just 5-10 years away from a standstill, a low efficiency instruction set focused on backwards binary compatibility is going to get washed out of most usecases very quickly. It's going the way of the IBM mainframe - still sold decades after its heyday, but marginalized to a niche (bunch of enterprise cloud instances for software that is too expensive to recompile/port).
M1's awesomeness has to do with:
- assembling a killer team - 5nm process - high speed, low latency DRAM - big-little
The only substantive difference between the AMD64 and ARM64 instruction sets is that ARM64 has a more relaxed memory model.
2. Decoding took a significant portion of the chip when they were a million transistors. The m1 has 16 billion resistors, decoding is a much less significant fraction of the chip.
And sure, there's pipelining but than your limited by latency.
http://www.apothetech.com/amd-zen-3-vs-zen-2-amd-zen-3-is-39...
It's a little confusing still why they sold the whole thing while the market was growing.
Marvell seemingly abandoned portable devices and rolled IXP(?) into their own lines for a time.
A good part of why they take such a beating in x86 too, Intel has no backup plan because they're scared of their own backup up, while being oblivious to the fact that it was their backup plan that saved them during the post-P4 era.
At least AMD is not scared of throwing away their arch every few years and restart, they've pretty much been doing that like clockwork every five years for the past two decades.