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Comment by ogre_codes | Hacker News Reader

The CPU gains on ARM have been increasing consistently year over year for the past decade. People have posted benchmarks of the A11/ A12/ A13 versus Intel for a while so this has been pretty obvious. It's just surfacing because suddenly we have a desktop CPU with desktop software like compilers and other things where it's more obvious outside of benchmark tools.

Apple is just jumping onto their existing ARM track, once they migrate their product line, which has surpassed Intel. Once they've migrated all their lines to ARM, the performance gains will be more like they have been on the iPhone/ iPad over the past few years. Mostly 20-30%/ year.

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IMO, this has little to do with it being ARM. 30 years ago ARM had a significant micro architectural advantage in performance per watt, but in this era of 10 billion transistor chips, that advantage has disappeared. x86_64 rationalized the x86 architecture and decode is such a small fraction of the power budget that it really doesn't matter anyways.

What does matter, IMO:

- assembling a killer team

- 5nm process

- high speed, low latency DRAM

- big-little

I'm no expert, but the only big architectural differences are a massively larger decoder and a reorder buffer that's several times as large as x86 designs.

If these are actually the reasons for the performance difference, and it's difficult to do these on x86 because of the instruction set, it seems to this amateur that ARM64 really does have an advantage over x86.

Don't forget ARM's more relaxed memory model vs. x86's TSO.

One of the reasons Rosetta 2 works so well is Apple silicon sticks to the more restricted x86 memory model.

Does it? Apple's documentation seems to disagree [1]:

"A weak memory ordering model, like the one in Apple silicon, gives the processor more flexibility to reorder memory instructions and improve performance, but doesn’t add implicit memory barriers."

[1] https://developer.apple.com/documentation/apple_silicon/addr...

It's switchable at runtime. Apple silicon can enable total store ordering on a per-thread basis while emulating x86_64, then turn it back off for maximum performance in native code.

Here's a kernel extension someone built to manipulate this feature: https://github.com/saagarjha/TSOEnabler

Couldn't Intel just come out with a new set of reduced-complexity instructions that run on a per-process basis based on some bit being flipped on context switches? Then legacy apps would run fine, but the new stuff would work too. This seems not that hard to address.

As I understand it, the challenge to making wider x86 chips is the mere existence of some instructions. Adding new instructions can't help with that. But I'm just repeating what I heard elsewhere:

> Other contemporary designs such as AMD’s Zen(1 through 3) and Intel’s µarch’s, x86 CPUs today still only feature a 4-wide decoder designs (Intel is 1+4) that is seemingly limited from going wider at this point in time due to the ISA’s inherent variable instruction length nature, making designing decoders that are able to deal with aspect of the architecture more difficult compared to the ARM ISA’s fixed-length instructions.

https://www.anandtech.com/show/16226/apple-silicon-m1-a14-de...

I find that odd. Don’t they have some sort of icache? Intel could decode into a fixed width Alternative instruction set inside the icache, then use a wider decode when actually executing.

Yes, they have a cache for decoded operations. It'll hold a certain number but it's sort of inefficient because the fixed width decoded instructions are a lot larger than the variable length instructions so it doesn't hold too many. Because it doesn't help on code with large footprints and not too much time in inner loops you don't necessarily want the number of ops you can get form it to be too much more than the width of the rest of the system if you want a balanced design.

The ISA differences between ARM and x86 do not account for the difference in performance, there are multiple factors here (process, ssd, memory bandwidth, cache, thermal reservoir, etc).

While this is wonderful for ARM in the now-term, we just moved from walled ISAs to a plurality of ISAs, compute just became a bulk commodity in a way that it could not with an x86 duopoly.

Anyone can now take off the shelf RISC-V designs that are currently at > 7.1 coremarks/mhz and get them fabbed on Glofo or TSMC. If you need integrator help, you can use the design services of SiFive.

There’s not a shred of evidence RISC-V can approach the levels of performance discussed in this thread. There’s a lot of “big implementations can potentially do X” hand waving in RISC-V land, and not much real silicon to show for it.

Yes, a combination of things around Apple's A series CPUs.

ARM has been improving much faster than Intel.

Apple has been executing ARM much better than anyone else.

Apple's auxiliary processors and integration have been top notch.

TSMC has been crushing Intel in getting to 5nm.

Chalking it down to ARM doesn’t cut it... other companies make ARM chips too, including Qualcomm. Most Android phones run ARM, and given they outnumber iPhones heavily you’d expect massive improvements. But this is better than putting Qualcomm’s best chip into the Mac.

Qualcomm spend their time and energy on gaining monopoly lock-ins via standards committees, not building better chips.

Qualcomm seems to be stagnating just like Intel at the moment, it will be a few years until high performance ARM chips come to non-Apple devices, unless Microsoft can strong arm them for their Surface line

I'm guessing the high performance ARM chips for non-Apple devices will be coming from Nvidia or Samsung in the future

Yes, ARM is one piece of many. (Commented about this above)

Though I suspect if Qualcomm were able to source a TSMC 5nm chip, it would be more competitive with Apple than Intel is at this point though. Apple has a lot of other things going for it where Qualcomm lags (the Secure Enclave, graphics performance, audio and photo processing, the neural engine etc etc)

Debatable. Qualcomm operates under a strict transistor budget because their chips lack a dedicated customer willing to pay what it costs to develop an ultra-wide CPU like this. Apple knows they're going to sell 100+ million of whatever core they make so they're able to more easily amortize and justify the costs of development.

Intel gets no such benefit of the doubt. I have no idea what on earth is going on over there.

Agreed.

What I was trying to get at is that the ARM designs plus the TSMC fabs are a big part of Apple's success here. The pieces are out there where someone else could put together an ARM based package that's more competitive with Apple. In retrospect, maybe it's more likely to see something like this from Nvidia than Qualcomm.

Even then, it's hard to say how competitive that CPU would be. Just based on Microsoft's Surface with it's half-assed Qualcomm CPU, it seems feasible though.

I think another shock here is that a lot of people discredited the ability of ARM cpus as well.

Back when the iPad Pro with the A10X came out, Apple claimed it was faster than half of all Laptops sold and people in the PC space were yamming on and on about how numbers don't show how much better x86 cpus are at 'desktop stuff' and that ARM cpus can't equal x86, even with the same thermal envelope and shouldn't ever be compared. Ironically, many are now stating that the reason why they are so good is because of ARM, which isn't true either lol.

>people in the PC space were yamming on and on about how numbers don't show how much better x86 cpus are at 'desktop stuff' and that ARM cpus can't equal x86, even with the same thermal envelope and shouldn't ever be compared.

It needs 30W at 4 cores 3.2Ghz. Ryzen needs around 5W per core but it's on a worse process. The entire system does use less power than a x86 system but that has nothing to do with the processor. It's more about how the SoC is arranged and that RAM is (almost) on the same package. It means they can get away with higher bandwidth and lower power consumption for the entire system.

The idea that it's all about the processor is completely wrong. Yet all we have heard is how fanboys cry it's going to be 3x faster than desktop CPUs because of misleading TDP numbers.

As far as we know, all four large cores at max plus the 4 small is ~20W. Whole chip max power use is 30W including GPU and the ML processor. Ryzen also blows a lot of power on things other than cores but AMD is absolutely the closest to this however. The hard thing for them is that the Big/Little arch is a huge advantage for battery use at idle. I would say the game being played here is that Apple is betting on this to scale all the way up for fast burst but they know that the real advantage is that their cores can also scale much much lower than anything out there. Less about magical performance gains and more about remarkable power use paired with much better power management lessons learned by making smartphones. Qualcomm could do this too if they actually cared about it.

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