The challenge of doing that, is that there are apparently a lot of proprietary IP blocks (both analog and digital) that are in the FPGA (like the Viterbi decoder as the parent comment suggests) that would need to be redesigned before you could tape it out into your own chip.

I am not sure what other IP blocks are being used in these FPGAs, but a viterbi decoder can be pretty area and power heavy (relatively speaking.) I'm not sure if you would be able to get enough performance [speed] with modern WiFi protocols by implementing it in normal FPGA fabric hence why those blocks are woven into the FPGA.

All that said, this is still a very good thing, because it marks a step forward towards a more open source hardware ecosystem.