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Comment by bri3d | Hacker News Reader

If you're going down to the "fixed function chips must also be open" realm, you'd also need an open source FPGA (or to use PDK to try to tape out) for the OpenWifi design. My read is that currently OpenWifi is also tied to proprietary Xilinx IP cores like the Xilinx Viterbi Decoder.

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Yes, I agree. But perhaps the design that is implemented on the FGPA could just be turned into a regular ASIC as well, once it is known to work well.

The challenge of doing that, is that there are apparently a lot of proprietary IP blocks (both analog and digital) that are in the FPGA (like the Viterbi decoder as the parent comment suggests) that would need to be redesigned before you could tape it out into your own chip.

I am not sure what other IP blocks are being used in these FPGAs, but a viterbi decoder can be pretty area and power heavy (relatively speaking.) I'm not sure if you would be able to get enough performance [speed] with modern WiFi protocols by implementing it in normal FPGA fabric hence why those blocks are woven into the FPGA.

All that said, this is still a very good thing, because it marks a step forward towards a more open source hardware ecosystem.

Indeed, not only the viterbi but also many basic building blocks in the Xilinx and Analog Devices reference design which is the starting point of our openwifi project.

Viterbi won't be an issue, we know how to write our own viterbi decoder on FPGA. It just need some time.

A Thorough and comprehensive IP block analysis will be needed and we will also evaluate how big the effort will be to replace all (almost) the big company owned blocks. We have to do this analysis and invest effort in the future, because we really want to tape out a real opensource WiFi baseband chip! As the first step, RF won't be integrated.

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