No kidding. Despite the HN posters saying it's "factual" this is likely just 4 socket systems tied together with an interconnect.

If intel is really going to market these type of systems, they need to be a LOT LOT more transparent on interconnect latency / memory management issues etc.

These headlines are almost always clickbait when you try to run high contention workloads on these supposedly massive systems.

What is the name of the interconnect approach being used here? That's what I want to know.