> Is die space really a plausible answer as to why Intel would bother to put in a second AGU, but cripple it so that it can only work on "simple" addresses that even their own compiler is not "smart" enough to generate?
Maybe, it's possible whoever was responsible for handling this part of the core was given a strict area budget and adding in the full set of addressing modes pushed them over. In retrospect increasing that area budget to allow it could have been the smart move but not all decisions in CPU microarchitecture are necessarily well informed! Perhaps in this case they did in investigate and with the benchmark set they were using decided simple addressing modes only didn't have a large performance impact.
Another possibility is they wanted to add the full set of addressing modes and did so, then found this caused a timing issue (as in it produced a critical path that would reduce maximum frequency too much) or power issue and the way around the timing/power issue involved a large amount of work they didn't have time to do and/or the issue was discovered late in the day and the timing fix would have introduced some interesting new corner cases they felt increased verification risk too much. Given it's persisted over a few generations this is maybe less likely but perhaps the timing issue was so severe they couldn't work around it over multiple micro-architectures (or simply can not be fixed). Intel may simply care less about the restriction than the author (i.e. no-one who spends lots of money with them has kicked up a fuss about it, nor do they think the performance restriction is causing them a large issue which is costing them sales).
(I used to work at arm designing A-class CPUs. Finding your new microarchitecture that could execute X things at once had some annoying timing issue when doing so, often related to exception handling or something else rare, that required you to add odd restrictions to work around and then trying to understand how much the odd restrictions impacted performance and whether you should go a different way to avoid the restrictions was a common part of the job)
Edit: Oh and another reason you may point to die space is whilst the feature itself may not add much extra area it can push other things apart, making for longer wires, meaning larger buffers to drive them to make timing (or they're simply too far part to meet timing) so more area and power for those buffers.