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Comment by esmi | Hacker News Reader

It’s a nice tutorial on base plus index addressing but from the title I expected a tutorial on pointer tags as x86_64 is what makes tags even possible, i.e. we have a 64b address space but not 2^64 memory locations.

https://www.mikeash.com/pyblog/friday-qa-2012-07-27-lets-bui...

And for ARM.

https://www.mikeash.com/pyblog/friday-qa-2013-09-27-arm64-an...

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> i.e. we have a 64b address space but not 2^64 memory locations.

Except the designers foresaw this and established Canonical Addresses[0] to prevent people from using that "unused" space for tags. The space is explicitly reserved. This is probably why LuaJIT uses NaN tagging of doubles instead of tagged pointers.. even though that causes an issue of it's own[1].

[0]: https://en.wikipedia.org/wiki/X86-64#Virtual_address_space_d...

[1]: https://github.com/LuaJIT/LuaJIT/issues/49

On ARM you can turn this off with TBI, FWIW.

On Arm, PAC and MTE eat that space instead. (and you'll have Morello with 128-bit pointers soon, let's see if it'll end up being considered as productible for future Arm designs)

Actually, Objective-C's tagged pointers mostly rely on malloc's alignment guarantees.

This is the case for most tagged pointer systems. Indeed most of them come from a time when 32 bit support was required.

Sure. Some software has to exist to make use of this system, for example something has to create the tag in the first place, and mall ic is a part of that, but the large address space is what makes them possible.

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