In fact, out of Intel and ARM, ARM is the only one I know that tried to shut down software emulation...
(ARM blocked parts of QEMU from being published for a while, citing "you must have read the manual to implement this therefore you are bound by the terms of the manual". They also had an open source design removed from OpenCores.)
It would not be completely silly to modify QEMU with x86 guest and modified-ARM target (for implicit-barrier mode), and then just use QEMU for the emulation.
As long as implicit-barrier mode was generic enough I think Intel would have an interesting time claiming it infringed some patent of theirs. Making it efficient would remain Apple's problem but they are good at that. (Or were until the CPU designers left to start Nuvia.)
If Intel won that, implicit-barrier would have to be explicit-barrier which is just normal ARM, but there is no fundamental reason why that cannot be fast, if the processor is designed to expect a lot of barriers and optimised accordingly. Especially if a dense instruction encoding is created for it.
(Everything I just said applies to RISC-V as well as ARM, should Apple decide to change course again.)
https://www.forbes.com/sites/tiriasresearch/2017/06/16/intel...
Thanks for clearing that up. Wonder what the difference is that this article mentions.