1) With node sizes getting down to 5-7nm, it’s out of reach for standard X-ray technology.
2) Lets say you use some cutting edge technology like x-Ray tomography [1]. Now how do you read this back out and know what each circuit is doing? You could compare to a ref design, but maybe that ref design already has the backdoor in it?
3) How you get from VDHL/Verilog/hardware spec to chip is a proprietary, difficult, and computationally intense process that is anything but open and even if it were, require extreme computing and specialized technical talent to understand the final chip layout vs the input
4) Even if you could do that, the shear complexity of the code could have things hidden “in plain sight” by exploiting non-obvious features, such as all the side-channel timing attacks common on Intel chips these days.
5) Even if you had that down, you’d have to have someone like AT&T opening up hundreds or thousands of these machines, removing all the chips, hoping that no damage occurs and your imaging technology can read through the chip packaging, and imagine them one by one and ultimately compare to some reference.
Needless to say, this is not a realistic endeavor. We’re talking state-level espionage with resources and motivation. You have to control the supply chain, and hope your own supply chain isn’t compromised itself.
[1] https://arstechnica.com/science/2017/03/bright-x-rays-reveal...