That wasn't the case when I last looked it.

IIRC ROCm (in the form of HIP) defines a new C/C++ API that maps to either AMD intrincis or CUDA depending on a compile time flag.

It required converting your CUDA source code to ROCm code, though there was a code translation tool to help you with that.

To be honest: I don't really understand what ROCm stands for. AMD has been redefining their GP compute platforms so many times that it's easy to lose track.

https://rocm-documentation.readthedocs.io/en/latest/Programm...

Yeah I’m sure stuff like this can work without code rewrite but my guess is that it’s far from plug and play. I couldn’t use that to run my model on an AMD card tommorrow without some effort.