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Comment by rwmj | Hacker News Reader

Of course developers are free to do what they like, but I think it's a bit of a shame that it's not RISC-V. He's missing out on all the toolchain support in GCC and Clang, plus the ability to run various embedded operating systems including these days seL4. RISC-V has an embedded profile (RV32E) and a tiny implementation of that (PicoRV32) so I'm fairly sure it could be suitable for this.

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ZipCPU predates the Risc-V buzz and is more a lightweight alternative to things like the microblaze. Its for when you want a microcontroller on your FPGA.

As others have said, this pre-dates RISC-V. The author built it as a teaching / learning aid and blogs about it excellently: https://zipcpu.com/

More generally, anyone building their own CPU and architecture just for kicks gets serious kudos in my book. It's not a shame, it's brilliant!

Next week's project will be programming the software for a PicoRV inside the bus structure created by AutoFPGA, so I am very aware of the RISC-V architectures ... now.

I would very much like to build a RISC-V 64-bit variant (there are already many 32-bit variants), but so far the task isn't funded. Well, neither was the ZipCPU when I built it, but now such an upgrade would need to compete with other paying projects I'm working on whereas I didn't have an income when I started working on the ZipCPU.

He points out the reasons it is the way it is here: http://zipcpu.com/about/zipcpu.html

I don't see anything specific about riscv here, am I missing something?

Reasons like learning, very small #LUT devices, etc, that wouldn't be satisfied with 32 bit Linux capable RISCV.

For example "I wanted to know how to build a CPU. This includes learning how to build not only a CPU, but also backends for the C-library, GCC and binutils (GDB soon to come)."

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