But after learning about how small the RISC-V instruction set is (less than 50 apparently, but I can't find a citation for that anywhere), I'm far more motivated to get into it.
But after learning about how small the RISC-V instruction set is (less than 50 apparently, but I can't find a citation for that anywhere), I'm far more motivated to get into it.
That said, whether you choose to start with it or RISC-V, from personal experience SiFive's implementations are phenomenal. I used one of their free-implementations, and I was blown away by how easy it was to use their automated tools to build a core exactly the way I wanted. Not as easy as generating a NIOS core, but much more capable. With an Artix-7, I had a very capable low-range processor in about an hour.
https://www.cl.cam.ac.uk/teaching/1617/ECAD+Arch/files/docs/...
from the times when x86 wasn't that big: http://pastraiser.com/cpu/i8080/i8080_opcodes.html
30 years ago we were typing the hex codes of those commands straight into the Forth words bodies using the mental copy of that table (as you see it has very logical easy to remember organization)