edit: and yeah, the two LUTs allow me to index into them separately, and also guarantees that every quadrature combination never indexes into one LUT.
OK so the problem is kinda twofold with that...
First of all my application needs two sinusoids at quadrature (it's for downconversion in my SDR), which using that approach I believe I need dual read port RAM which takes up two RAM slices in my FPGA so I'm not losing anything by taking my approach.
Secondly I tried doing that but I seem to get an "off by one" error--basically if you subdivide 0 to pi/2 with let's say 2^10 points, you either:
a) the last point (index=2^10-1) corresponds to sin(pi/2)
b) the last point + 1 corresponds to sin(pi/2), and the actual last point is sin(pi/2 - (pi/2) / (2^10))
the a) approach that means when you sweep through 0 to 2^10 - 1, the next index isn't 2^10 - 1, but rather 2^10 - 2, which means you'd need some annoying logic rather than simple bit slicing.
the b) approach you'd have you make a special case and it's all too annoying.
Maybe I'm just not creative enough but I haven't been able to come up with an elegant way of doing it with 0 to pi/2 LUTs (just by using simple bit slices)
I also haven't looked at any actual implementations (actually I couldn't even find them lol) other than the basic description on wikipedia. Maybe that's why.