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If you pin VMs to different cores, never sharing hyperthreads, then the risk is contained per VM (or per core).

Let's hope there's no inter-core side-channel lurking in the shadows :(

It is time to rethinking the engineering methodologies we use in the electronics/informatics field.

Breaking x86 backward compatibility? That would be fun.

So we are between a rock and a hard place.

If you give two threads on one core to one VM, the VM could attack the hypervisor. It could have one thread run the TLB probe loop while the other does something that's handled by the hypervisor.

Isn’t there typically a VMM per VM? So the risk is then lower?

http://3.bp.blogspot.com/-OyjQUpLowmg/Udz1_NxqNLI/AAAAAAAABV...

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