If you think Verilog is bad, you should see the languages used by heart surgeons, civil engineers and rocket scientists. The language of human biology is ridiculously verbose without even a hint of polymorphism. ;-)

My point is that it's a little silly to evaluate hardware engineering through the lense of software engineering.

In hardware engineering the part that looks like "software" (what a HW engineer may refer to as the behavioral RTL) is a small component of the total design effort. The tradeoffs are all completely different.

Computer hardware engineering is much closer to designing a bridge than it is to writing a software application. Debating the best hardware-descriptor language is similar to debating whether bridge designers should use No. 1 or No. 2 pencils.