To put that into perspective, reports I read put MIPS at $700-900k with ARM starting at $1+ million. Buyers of those get their ecosystem of existing tools, OS's, libraries, etc. RISC-V doesn't have much of an ecosystem yet. However, if FOSS software covers application requirements, then a SOC using the RISC-V chip saves a lot of money upfront. Even more down the line since SiFive doesn't charge royalties.

(Edited to change part about royalties after reading article more closely.)

From what I understand, the RTL of these cores and a good chunk of the stuff around them is open [1]. The cores themselves are basically all specialized Rocket cores. What you're paying for is probably the ready-to-fab routed cores in whatever CAD format and support.

[1] https://github.com/sifive/freedom

They charge for the peripheral IP and system design. The actual computation core architectures are freely available on GitHub under open source license.

No, as far as I can tell, it's an actual RISC-V ASIC; it has 5 cores on a 28nm die.

I'm afraid the amount of FPGA required for 4 beefier cores + 1 simpler core + 2 MB coherent L1 cache could cost more than $999, but I may be wrong.