> Once you get down to 5nm features they are only about 20 silicon atoms wide.

This is a complete misunderstanding of modern processes.

It’s conflating feature size with some measure like “wire width”. Feature size is best thought of as the tightest corner radius you can cut in a piece of wood. Actual logic (and wires) are far larger than this. There’s actually a shocking amount of room “down there”, still. The problem is that lithography probably won’t scale down after some magic number (say 2 or 3 nm), and we’ll have to do something else clever. It’s been a while since I looked into this, but IBM’s smallest AFM-created transistor is ~10 atoms, which is something like 4 orders of magnitude (or more!) smaller than, say, 10nm.