Comment by sliverstorm | Hacker News Reader

Comment by sliverstorm | Hacker News Reader

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this ability to change from functioning as a bit of memory to being a bunch of functional logic on the fly at the speed of a memory read? That's going to be crazy. It will open up possibilities that we probably can't even imagine right now.

There might be clever ways to make a particular circuit dual purpose or something (Storage element that can do math on itself? A math pipeline that doesn't need pipeline flops?)

But arbitrary reprogrammability is already here. It's called an FPGA, and it sees only niche use, not in the least because developing a bitstream to program it with is a huge chunk of work. So the days of a chip that constantly morphs like a chameleon to unrecognizable new forms is probably a long way in the future.

I like to remind myself the industry is called VLSI- very large scale integration. In other words, the job is not about transistors. More than anything else, it's about managing the complexity of billions of transistors. Digital CMOS is a great example; transistors can already do so much more than CMOS, but it's a massively simplifying design scheme.

FPGA reprogramming is slow. It's like saying we can make more oil because all we have to do is wait a few hundreds million years for all our plant matter to rot. And correct me if I'm wrong, but can you even reprogram an FPGA while it is actively being used? I don't believe so. Much less reprogram it from the gates which are active.

Obviously FPGA is not as slick & fast as a memristor chip could maybe be, but if the economics of a morphic processor made sense wouldn't you expect to see FPGA coprocessors and a library of utility bitstreams to be dynamically loaded as needed?

Of course, the reason we don't see that is the economics aren't great, the performance boost isn't either, and developing those utility bitstreams is a herculean task by itself.

The real world incarnation of all this I would argue is the SoC. Silicon is cheap enough you don't make one mighty morphic chip; you make several dedicated IP's and put them all on one chip.

> And correct me if I'm wrong, but can you even reprogram an FPGA while it is actively being used?

You're wrong, this is called partial reconfiguration.

Can you reprogram the part of an FPGA that is actively being used?

The answer is no, but the sad part is, there's no real reason why not.

An FPGA isn't really a "gate array," but a huge ensemble of small lookup tables that are made with what amounts to very fast static RAM. If major FPGA manufacturers didn't guard their bitfile formats with their lives, it's possible that entirely new fields of research would have emerged to find new ways to take advantage of the existing hardware in these chips, much like what GPGPU researchers have done with graphics cards.

Hmmmm.

I wonder how expensive it would be to make a really really tiny FPGA with a few tens of cells in it.

As in, I realize chip design is expensive and crazy complicated, but small runs are only around $5k or so. I'm wondering if FPGAs manufacturing has similar costs - or at least similar-ish enough to be potentially interesting.

If you could go from zero to tiny prototype FPGA with 5 or 6 figures, you might just be able to pull some VC money out of thin air to kickstart with. Or you might not even need to go in the VC direction, there's bound to be a group of people out there with collectively enough between them to kickstart something like this. I'm uncertain if Kickstarter would be a horrible disaster.

With prototypes made, you'd just need to send a few of the prototypes out to some smart PhDs and hardware hackers, get them to show what's possible, and that could be a viable way to get further investment and complete the bootstrap cycle.

Obviously the point of all of this is to make a chip that's as open as reasonably possible. Physical chip manufacturing is likely to be NDA'd (for example the SRAM would probably be supplied as a reference design from the foundry) but the "how to poke this with software" could be super open. Would be fun.

Here are a couple of articles about a homebrew FPGA (only one logic cell, but it's step in your direction).

https://hackaday.com/2012/09/20/homebrew-fpgas/

http://blog.notdot.net/2012/10/Build-your-own-FPGA

ooo, interesting. Thanks for this!

> If major FPGA manufacturers didn't guard their bitfile formats with their lives[...]

Why do they?

I should say they don't have real reasons, but they have plenty of weak ones. They see their toolchains as part of their competitive advantage, which is weird because FPGA toolchains are some of the most annoying software applications around. The market as a whole could only benefit from additional third party involvement.

Especially at the high end, the manufacturers commonly introduce new hardware constructs -- high-speed transceivers, clock generators, memory controllers, that kind of thing -- and they don't really want to document and disclose the inner workings of these components at a level that would allow third parties to write tools for them. It could potentially take a non-trivial amount of documentation and customer support work. Meanwhile they want to preserve their trade secrets, and they also don't want to attract infringement suits from either patent trolls or legitimate competitors. Disclosure of bitfile formats would open those particular kimonos a bit too wide for comfort. This is largely why Linux users can only get GPU support via binary blobs.

At the low end, some good reverse-engineering progress has been made by people like Clifford Wolf on the Lattice parts. This work is certainly important, but as long as there's reasonably rapid technological progress on the hardware side, reverse engineering is never going to be enough to sustain a healthy third-party tools industry.

It's a real shame. Imagine how far we'd (not) have come if Intel and Motorola had walled off their instruction sets...

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