The issue with ASIC is that when there is new AI algorithms that gets developed, they may not be even able to use those. General purpose hardware will be able to. You are stuck and need to upgrade.
Further speedups can be gained by going with lower precision ops (eg: float16). A chip specialized for deep learning could support f16 only, which would allow it to have more compute power using less area and less power.
So, in short, there are ways to make ASICs that are more efficient for deep learning while still giving the ASICs flexibility. ASIC doesn't mean there is no programmability.
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