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Comment by Nursie | Hacker News Reader

Makefile syntax is pretty simple, once you're used to it.

Multiple Makefiles works fairly simply with the include directive.

The thing I've found painful before, with C projects, is getting Make to recognise that it needs to rebuild when a header has changed. There are various ways around this (makedepend etc) but they've all been quite painful to set up and not quite perfect.

That said, with modern machines that have NVMe storage and massively fast processors, a complete rebuild is seldom a big time cost

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Or you can let the compiler generate the header-dependency Makefiles for you:

http://make.mad-scientist.net/papers/advanced-auto-dependenc...

You already tried that? I do not find it painful to set up.

Maybe not using exactly that method, but I am pretty sure I have tried using gcc for it. Will have a proper read of that later.

The syntax is a tad hairy though,and I'd want to adapt it - I tend to avoid compiling individual C files to objects these days, due to WHOPR optimisation.

If you don't care about incremental builds and want just a full rebuild, I would write a shell script instead of a Makefile.

That said, I think incremental builds are important for most use cases.

Oops, let me amend that. The partial order of make is still useful for parallel builds from scratch, even if you don't care about incremental builds. Like almost all other languages, shell forces a total order on execution.

On the other hand, computers are fast enough that serial full builds indeed work in some cases.

I'd argue that the make syntax and built-in features are a huge boon over starting from plain-old-shell regardless.

What are some examples of that? Shell can do basically everything make can. The syntax of both is ugly but I'll grant that make is more uniform.

And btw there is no way to use make without shell, but you can use shell without make.

I guess it probably comes down to preference, but I can take a list, write a one-line .c->.o transform, a one-line link target, add in a clean target etc etc faster with make.

Sure, I can write these as functions in bash, call once for each source file, check return codes etc etc, but I find expressing dependencies faster than writing anything like robust code in shell, and make deals with failed steps by stopping.

And as you rightly pointed out above - once you get the dependencies nailed down, you can parallel build trivially.

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