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Comment by arcanus | Hacker News Reader

Anything with a pulse can provide decent competition for Xeon Phi. It is well know these 'accelerators' are barely providing speed-ups compared to existing CPU solutions.

While Phi are easy to port, they aren't close to GPUs for vectorization-friendly problems. This is likely why the Aurora supercomputer has been delayed/canceled.

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I wonder why noone (?) has tried to bolt on a GPU style SIMT extension to a general purpose CPU architecture. It's a more flexible programming model with a decently(?) low additional cost compared to vector style SIMD.

IIRC Andy Glew had some slide deck where he advocated that. Edit: https://drive.google.com/file/d/0B5qTWL2s3LcQNGE3NWI4NzQtNTB...

My understanding is the instruction set isn't as far removed as you seem to imply, and the huge differences are in programming model/compiler.

AVX-512 has many of the primitives required, and ISPC ports the GPU programming model to CPU SIMD.

Yes, AVX-512 IIRC adds scatter/gather, and masking/predication, bringing it substantially closer to classical supercomputer long vector ISA's compared to the short vector ISA's mainstream CPU's have been equipped with for the past decade or so. Still, even with these improvements, as explained in Andy Glew's slide deck I linked to, it's less flexible than a SIMT style approach.

Where do you get the information that Aurora is canceled?

Officially I think the only thing that can be said, has been said by Paul Messina: "I believe that the Aurora system contract is being reviewed for potential changes that would result in a subsequent system in a different time frame from the original Aurora system. But since that’s just early negotiations, I don’t think we can be anymore specific on that.” source: https://insidehpc.com/2017/06/told-aurora-morphing-novel-arc...

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