Can you elaborate on this? From there it was just a matter of defining each control line symbolically and "assembling" each microinstruction by ORing the appropriate things together"?
This is basically your decoder then?
Can you elaborate on this? From there it was just a matter of defining each control line symbolically and "assembling" each microinstruction by ORing the appropriate things together"?
This is basically your decoder then?
risk-vee is a really basic (read: dumb) "common bus" design. All of the internal components of the CPU share the same 32-bit data bus. The heart of the control unit is a ROM that is 32-bits wide. Each bit is connected to one of the various things in the CPU. To make generating the microcode easier I defined a mask for each line.
Taking "move the PC to the memory address register" as an example: The register that holds the PC has an output enable line, and the memory address register has select/enable and both would need to be high. Pulling a few lines from microcode.js:
pc_read = parseBin("0000-0000 0000-0000 0000-0000 0100-0000");
mem_address_write = parseBin("0000-0000 0000-1000 0000-0000 0000-0000");
So the microinstruction we want ends up being pc_read | mem_address_write
I feel like I'm simultaneously under- and over-explaining it.