However, they seem to have a strong technical pipeline and they have historically punched above their weight-class. Does it look like they are going to make it?
However, they seem to have a strong technical pipeline and they have historically punched above their weight-class. Does it look like they are going to make it?
Just like Intel had the P4 hole that it had to drag its way out of, so now AMD has had Bulldozer. Notice how Intel has been quite conservative with each individual tick/tock, trying to keep their pipeline full. Doing crazy changes risks causing a pipeline stall which could last years. Each new architecture is risky, and AMD screwed up with Bulldozer. From early signs it looks like Zen is a winner, hopefully AMD can stick with it for a while.
Mankind Divided's recommended specs are FX-8350 or i7 3770. The price difference between the two in their heyday was $100 in AMD's favor.
I see the evidence of that happening with AMD GPUs versus Nvidia, but versus Intel processors?
Can you explain?
Now that newer software is using more threads, the old FX gets a big performance boost while the old i3 is only the same speed it ever was.
It took about the same amount of time for Intel to release the Core and Core 2 architectures after realising they had made a huge mistake with the Pentium 4.
I've heard some people theorising that Intel might have worked their current architecture into a corner and they might have problems innovating out of it. I guess we will see when information about Zen's performance shows up.
That's basically the point of Zen, Bulldozer was an architectural dead-end that wasn't going anywhere.
Besides, it's not like Intel have massively innovated since Sandybridge. Ivy, Haswell, Broadwell and Skylake are little more than successive perfections of the Sandybridge architecture.
It's hard to tell from the slides, but it looks like Zen is a much wider architecture than Intel, with 10 execution ports (4 ALU, 2 AGU, 2 FP ADD, 2 FP MUL). Sandybridge had 6, Haswell and later have 8 execution ports. Bulldozer had 4 integer execution ports plus 2 float ports, which are shared between each pair of cores.
The most interesting thing about those slides is the layout of the blocks marked "Scheduler". Intel chips all have a single scheduler, Bulldozer had one float scheduler (shared) and one integer scheduler. But I'm counting 7 schedulers on the Zen slides, one float scheduler managing the 4 floating point execution ports and 6 integer schedulers, one for each execution port.
The text mentions it has to fuse the four FP ports to do a single 256-bit AVX per cycle. This is significantly less wide than Intel architectures (half/quarter). We can interpret the width thus as 4+2+1 ports, which is in the Haswell ballpark.
What is maybe more telling here is the 16-byte load/stores, Haswell is doing 32-byte at the same rate. It points to Zen abandoning FP bandwidth in both client and server. Perhaps they want to rely on GPGPU with the on-chip GPU to do compute workloads?
> The most interesting thing about those slides is the layout of the blocks marked "Scheduler". Intel chips all have a single scheduler, Bulldozer had one float scheduler (shared) and one integer scheduler. But I'm counting 7 schedulers on the Zen slides, one float scheduler managing the 4 floating point execution ports and 6 integer schedulers, one for each execution port.
Depends what they mean with Scheduler. If it means reservation stations for micro-ops, then that's already the case in other micro-architectures. If Scheduler means assigning micro-ops per port, than there can logically only be a single one.
4+2+2, no need to combine all 4 ports, just the two multiplies or the two adds.
The text is speculation of the journalist. There It's possible that each port is actually 256 bits wide and fusing them is only needed for the 512bit AVX instructions that Intel don't even support yet.
Even if AMD are splitting the 256 bit fpus in half, that is still a huge win over average code, because 128bit SSE instructions are much more common than AVX instructions, and AMD can execute upto four of them per cycle.
Even Intel disable the upper half of their FPU most of the time to save power, AVX instructions get split into two 128bit micro-ops unless until a threshold is encountered and the upper half powers up.
> If Scheduler means assigning micro-ops per port, than there can logically only be a single one.
I assume that means one Re-order buffer per port. Bulldozer already had two Re-order buffer, one for float instructions and one for interger instructions, which proves multiple ROBs for different ports are possible. You just need to track dependencies across ROBs.
I'm guessing that tracking deprbdiencies across 7 schedulers is not much harder than tracking deprbdiencies across 2.
The FP contention between the cores in a Bulldozer module makes all recent AMD chips perform objectively worse in most benchmarks than their peers from Intel.
Intel's architecture isn't a priori a goal to achieve. Intel's performance in real-world workloads is a good goal.
There are some heavily-threaded, integer-heavy workloads that Bulldozer and related parts are still incredibly competitive at, even compared to current-gen Intel parts. For the right workload, a Bulldozer-family processor can be a real screamer and they are priced incredibly aggressively. We should recognize, though, that the architecture is high performance only for these specific workloads.
Perhaps AMD should have pursued more innovative architectures. I am not saying that Intel's is perfect. But it is important to note that for current general purpose computing workloads, Intel's architecture is superior to Bulldozer.
Edit: As the day goes on it seems like they're trading back over $7, so obviously the market disagrees with me :) They were trading around $10 before losing profitability, and in the $20-$40 range during their mid-2000s heyday, so maybe the market is expecting performance closer to that. I think that is optimistic still, but again who knows.
If an event is set to happen in an hour, you can be fairly certain it will happen, so it should be strongly 'priced in'. If it's happening months or years out, a lot could happen in the meantime, thus it's not 'fully' priced in. It's not a discrete event, but rather some sort of curve (perhaps sigmoid?) that depends on perceived risk.
Obliquely, also remember that while Nvidia is winning on the "pure" GPU front with the awesome 1080 etc, the major problem for Nvidia is that its tech needs a host processor, and its ARM attempts are going nowhere (Nintendo NX notwithstanding). AMD does not face this problem. It's becoming clearer that pure-parallel is not always optimal. Hybrid GPU/CPU architectures have a lot of upside as we are seeing with the Xeon Phi use cases, which smackdown on Nvidia bigtime as soon as you mix even the slightest bit of dependency in your algorithms.
I am very bullish on AMD. I believe its stock has double potential, because the price is so catastrophically pessimistic already. And without even talking market valuations, I think we have had enough of monopoly-style price gouging on Xeon and Tesla.
Whatever is happening in the company now is what you will be seeing in 2021 or 2023. Whether they will make it depends on how well the managing team handles that long lead time - for their leaders to give the engineers and product people as much time as possible to keep the company alive until each product comes into being.
CPUs are designed in a pipelined manner -- once the high-level team finishes up their work and passes it on to the low-level guys, they immediately start working on the next version, with the first version still years away from release. The total cycle from drawing board to store shelves is >5 years, and the skill sets required of high-level designers are very different than those required to turn it into silicon, so this just allows them all to have something to work on.
The long lag time is why chip companies can have disasters like P4 or Bulldozer, and they last so long. When some of the basic assumptions are wrong, the designers won't actually find out until after the design hits silicon, at which point the next two versions are already pretty much locked.
No their not, there Q2 financials had them in black.
Probably, but I still think they would do far better with an owner like Qualcomm (granted Qualcomm would still have enough money in the bank to actually do something interesting with AMD after the acquisition).
I've always wondered why intel does not buy AMD... is it just because of an expected anti-trust lawsuit? With Nvidia, ARM, IBM, it does not seem that a monopoly in x86 would dominate ALL architectures, but perhaps it would not be viewed that way.