That's really neat. Especially as I work a little on methods for secure HW/SW design. Mostly done with digital side of ASIC methodology but still custom digital and analog stuff to figure out. Appreciate any tips you have on such threads where I'm exploring.
"So ARM and MIPS in practice are "open" to select partners who make chips which are in turn "open" to select partners, unlike the PC where you have not only Windows, Linux, BSD etc. but things like MenuetOS and TempleOS and it's both legal and technically feasible to do this kind of thing. "
So, back then, ARM and MIPS I.P. holders didn't allow a PC-like product to be built with their chips? It was custom negotiated for every product with no platforms available? I could see you calling that less open and the ecosystem hit it would have.
"I wonder what it'd take for open IPs to gain significant traction in hardware. It's easy to come up with reasons for them to fail or succeed but it's not easy to predict which reasons will end up more dominant."
Inherently safer or language-specific ISA's like jop-design.com or crash-safe.org. Microcontrollers where any royalties are eliminated to further lower costs. OEM's targetting hobbyists and/or idealists that want maximum freedom. Anti-subversion efforts where multinational pride kicks in with an ISA like RISC-V being remixed allows everyone to feel like the owner. Tools or projects for processor design in academia where they just want something to work with and build rather than screwing around with I.P. and legal risk. Wait, that last one already happened and I already named it. ;)
So, given you've done hardware, what do you think of my recommendation that market wanting OSS hardware just build on Gaisler's SPARC products? There's a configurable CPU (Leon3) and substantial I.P. library already GPL'd or licensable. Probably closer to MIPS than ARM in price. There's also a 4-core version. One could put them right in an ASIC with Pi- or Novena-style boards w/ SPARC ecosystem (esp BSD/Linux) leveraged immediately. Alternatively, really my touch, is swapping out SPARC-specific stuff (eg instruction handling) for RISC-V so all the I.P. just magically supports a RISC-V solution. Open I.P. can gradually be developed to replace it, maybe keep using Gaisler's proprietary source where compelling, stuff is 90+% ASIC-proven from start, people can inspect, paid get paid, everyone is happy.